For IPTV, Satellite DTV, Cable DTV, Terrestrial DTV, PVR and Disc Player l This SV6100 is an integrated AVS/MPEG-2 set-top-box decoder chip which may be applied to Satellite/Cable/Terrestrial Digital TV and SDTV, IPTV, PVR, SD Disc player. It supports AVS
and MPEG2 SD video and most of popular audio standard
(e.g. MPEG-1 Layer I&II, MP3).
lHighlights of the SV6100 include a high performance transport processor, video/audio decoder and a display controller with scaling. The general purpose DSP is used to decode most of the audio format stream in audio decoder and the audio decoder integrate I2S interface and S/PDIF
interface. SV6100 requires minimum support from an
external processor, which is mainly required to control
SV6100 during the initialization and deal with the
interrupt. SV6100 provides the capability to access the
relevant internal
registers and parameter stores with
the help of system processor. This guarantees the
possibility of a flexible error handling and a
robust and error tolerant decoding control. The external
host CPU can communicate with SV6100 through PLX or an
asynchronous SRAM interface. The host can access the
SV6100 internal registers and the external DDR to
control the SV6100. GPIO provides external user
interfaces as a peripheral. An EJTAG interface provides
access for software development debugging. All modules
are scan enabled and therefore can be production tested. lTo help our customers achieve a short time-to-market, the SV6100 comes with the Driver Application Programming Interface (API). API is a complete driver set, allowing fast and efficient customer software design. In addition, API is now the standard programming interface for DVB components, easing migration to future devices.
SV6100 Features
l ISO/IEC 13818-2 - MPEG-2 MP@HL
l ISO/IEC 11172-2 - MPEG-1 constrained parameter set
l AVS1.0 level 4.0
l MPEG-1 Layer I&II(2 ch), MP3(2 ch)
l DSP processor for audio, 5.1 to 2 channel down-mixing, PCM audio mixer, S/PDIF and I²S interface
l All ATSC and DVB SDTV MP@HL formats
l Real time decoding of multiple streams
l Error detection and autonomous error concealment
l Support 32 PIDs and 32 Section filter, DVB CSA: CA support and DVB-CI and TS stream output
l Display controller with up to 2 true colour graphic or CLUT layers (total 4 layers) and applications: Menu, Logo etc.
l Flexible TV mode conversion (e.g. PAL to NTSC)
l ITU-R BT.656/SD input/output
l 2 × GPIO
l DDR DRAM: Up to 200MHz and 256MBytes supported and all commercial DDR SDRAM supported with the flexibility of 16/32/64bit external DRAM bus width
l PLX Local Bus: 32 bits, 33MHz PLX local bus
l On-chip PLL, requiring only 27.0MHz crystal
l Advanced Technology: 0.18µm CMOS, QFP 208 Package
l Ambient Temperature Range: 0°C to +70°C
l 1.8 volt device with 3.3 volt I/O
l Power consumption: typ. 2W
Functional Block Diagram
Functional System Block
Disclaimer Note: The contents of this document are subject to change without notice. Customers are advised to consult with a Spreadtrum sales representative before placing orders. All information and circuit diagrams in this document are presented “as is”; no license is granted by implication or otherwise.
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